The present invention relates to bit shift circuits and more particularly to a programmable bit shift circuit.
Bit shift circuits are often used in electronic computers or the like for processing binary-coded multi-bit data in accordance with predetermined programs. An example of a conventional bit shift circuit of this general type is as shown in FIG. 1. In this circuit, the input bit signals D.sub.i (where i is a positive integer) of multi-bit data to be shifted are applied to the corresponding set input terminals S of R-S flip-flop circuits FF.sub.i which are latch circuits. The outputs Q of the R-S flip-flop circuits FF.sub.1 are applied in predetermined logic combinations to logic gate circuits L.sub.i+1 and L.sub.1-1. For instance, the logic gate circuit L.sub.n is composed of a two-input NAND gate G.sub.1 receiving the output Q of the flip-flop circuit FF.sub.n+1 and a right shift signal SHR, a two-input NAND gate G.sub.2 receiving the output Q of the flip-flop circuit FF.sub.n-1 and a left shift signal SHL, and a two-input NAND gate G.sub.3 receiving the outputs of the NAND gates G.sub.1 and G.sub.2. The other logic circuits have the same arrangement as the logic gate circuit L.sub.n.
The output of the NAND gate G.sub.3 in the logic gate circuit L.sub.i is applied to one input terminal of a two-input NAND gate NG.sub.i to the other input terminal of which a strobe signal is applied. The output of the NAND gate NG.sub.i is applied through an inverter buffer I.sub.i to the set input terminal S of a flip-flop circuit FF'.sub.i. The outputs Q of the flip-flop circuits FF'.sub.i form the bit-shifted data SD.sub.i.
In the above-described circuit, the output data SD.sub.i provided in response to the input data D.sub.i can be represented by the following logical expression: ##EQU1## where SHL and SHR are the left shift signal and the right shift signal, respectively. When the signals SHL and SHR are at "1", they represent left and right shift instructions, respectively. Accordingly, as is apparent from the expression (1), in the bit circuit of FIG. 1, the input data can be shifted to either the right or the left by one bit position. However, it is impossible to shift the data by plural bits with a single right or left shift instruction. Therefore, the above-described circuit is disadvantageous in that data multiplication takes a relatively long time.
In order to eliminate this disadvantage, a circuit has been proposed in which multi-bit shift circuits such as a two-bit shift circuit (SD.sub.i =D.sub.i-2 .multidot.SHL.sub.2 +D.sub.i+2 .multidot.SHR.sub.2) and a four-bit shift circuit (SD.sub.i =D.sub.i-4 .multidot.SHL.sub.4 +D.sub.i+4 .multidot.SHR.sub.4) are implemented separately in hardware and the two circuits then combined to carry out, for instance, a six-bit shift operation to thereby reduce the total time required. However, that technique is still disadvantageous in that the hardware itself is considerably intricate and accordingly an integrated circuit implementing such a circuit has a large chip area.
In another conventional circuit, a shift register is employed for subjecting data to bit shifting. This circuit can be implemented quite simply in hardware. However, the circuit is still disadvantageous in that it is difficult to process input data at high speed because the shifting operation can be carried out only at the rate of one bit per clock pulse.
Accordingly, an object of the present invention is to provide a programmable bit shift circuit in which data can be instantaneously shifted by as many bits as desired.